Ecet 100 Lab 5

Course Number: ECET100

Professor:

Laboratory Number: 5

Laboratory Title: Introduction to Digital Logic Gates

Submittal Date: 4/1/2012

Objectives:

To understand the basic logic functions (AND, OR, and NOT) and their complement used in Boolean algebra and digital logic design. Test a simple logic small scale integration (SSI) integrated circuit (IC) devices.

Results:

For this week lab, I was able to understand how to read data sheet for the logic gates such as AND, OR, NOT, NOR, NAND, and XOR. In the data sheet, I was able to read the truth table of the logic gates and the Boolean expression as well. Then, I built the circuit in the breadboard with an LED to test the inputs. After building the circuit, I compared it to the truth table from the data sheet.

Conclusions:

After completing the lab, I fully understood how each logic gate worked when receiving HIGH and LOW inputs. Also, I was able to see how each logic gate was numbered in the IC device.

Team: | | | | | |

| Name | | Program | | Signature |

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| Name | | Program | | Signature |

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| Name | | Program | | Signature |

Observations/Measurements:

III. A. OR Gate Data Sheet Truth Table, Boolean Expression, and Measured Truth Table:

Input (pin 1) | Input (pin 2) | Output (pin 3) |

H | X | H |

X | H | H |

L | L | L |

| | |

2-Input OR Gate Theoretical Truth Table

OUTPUT Y = | A + B |

Input (pin 1) | Input (pin 2) | Output (pin 3) |

L | L | L |

L | H | H |

H | L | H |

H | H | H |

2-Input OR Gate Measured Truth Table

Include image of hardware setup for this gate here.

III. B. AND Gate Data Sheet Truth Table, Boolean Expression, and Measured Truth Table:

Input (pin 1) | Input (pin 2) | Output (pin 3) |

H | H | H |

L | X | L |

X | L | L |

| | |

2-Input AND Gate Theoretical Truth Table

OUTPUT Y = | AB |

Input (pin 1) | Input (pin 2) | Output (pin 3) |

L | L | L |

L | H | L...