Computer Organisation

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Date Submitted: 08/12/2013 07:46 AM

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Question 1

a.Draw and explain the operation of Central Processing Unit (CPU), main memory and system bus to allow the operation to read data from memory.

Data and instructions are stored in the main memory and an Arithmetic Logic Unit is able to operate binary data. Instructions in memory are interpreted by control unit and enable them to be executed. Input/Output is operated by control unit also.

b. Explain the main operations occur in instruction cycle.

Instruction cycle is the period required to complete the execution of an instruction. One instruction cycle consists of 3 to 6 machine cycles. Direction of the control unit processes the instruction in step-by-step manner. There are six basic phases of the instruction cycle; fetch instruction, decode instruction, evaluate address, fetch operands, execute and store result.

Fetch instruction get the next instruction from memory and load it into instruction register IR.Instruction pointer will be loaded into Memory Address Register (MAR) and the instruction will be loaded through the Memory Data Register(MDR).Instruction pointer address will be updated while reading instruction from memory.Decoder instruction examines opcode of the instruction and the outcome is choosing exclusive decoder output lline.The output line signals a circuit which implemets the consequent operation.

Address of the memory location are computed by evaluate address of the instruction operand. Next, the fetch operand level; in this level MAR is loaded with address calculated and the memory is read into MDR, which enable the data as input to the processing unit. ALU executes microcode for the instruction which is selected by the decoder output line.Finally, in the store result phase, result is written to the chosen destination of the instruction operand and a new instruction cycle is begin.

c.Explain the request signal with Interrupt Request (IR) and non-mask interrupt

Interrupt requests (IR) handle a range of hardware...