Midterm

CS 154

Spring 2010

Midterm

Single-Issue Implementation ______/20

Pipelining ______/25

Data Dependencies ______/25

Performance ______/10

MicMac ______/8

______/88

1. Single Cycle Implementation

Draw the wires and/or components necessary for only the following instructions. Make sure you include the update to the PC, sign extension, shifting, etc. Show only the control that is important for the explanation of this operation (i.e. alu op). Add the least components necessary.

|op |rs |rt |rd |Meaning |

|slt $1, $2, $3 |2 |3 |1 |if ($2 < $3), $1 = 1, else $1 = 0 |

|op |rs |rt |imm |Meaning |

|stinc $3, 4, ($5) |5 |3 |4 |M[$5] = $3; $5 = $5 + 4 |

2. Pipelining

Assume the following latencies for the pipeline in the book:

|Fetch |Decode |Execute |Memory |WriteBack |

|4ns |2ns |8ns |7ns |2ns |

Pipeline register delay: .1 ns

___4(a)What is the clock cycle time for a single-cycle-implementation computer?

___4(b)What is the clock cycle time for the above pipelined computer?

___4(c)If we split the stages an infinite amount of times, what would the clock cycle time be in the above pipeline?

___5(d)If the average CyclesPerInstruction (CPI) of the above...